Regression
simulation_libraries_msl32.Modelica.Electrical.Digital.Examples.VectorDelay.mos (from (result.xml))
Stacktrace
Output mismatch (see stdout for details)
Standard Output
+ Modelica.Electrical.Digital.Examples.VectorDelay ... execution failed ==== Log C:\Windows\TEMP/omc-rtest-OpenModelica/simulation/libraries/msl32/Modelica.Electrical.Digital.Examples.VectorDelay.mos_temp4938/log-Modelica.Electrical.Digital.Examples.VectorDelay.mos "true " "" OpenModelicaModelTesting.Kind.VerifiedSimulation Modelica.Electrical.Digital.Examples.VectorDelay {"delay.y[1]","delay.y[2]","delay.y[3]"} Alarm clock == 1 out of 1 tests failed [simulation/libraries/msl32/Modelica.Electrical.Digital.Examples.VectorDelay.mos_temp4938, time: 491]