Regression
simulation_libraries_msl32.Modelica.Electrical.Analog.Examples.CauerLowPassOPV.mos (from (result.xml))
Stacktrace
Output mismatch (see stdout for details)
Standard Output
+ Modelica.Electrical.Analog.Examples.CauerLowPassOPV ... execution failed ==== Log C:\Windows\TEMP/omc-rtest-OpenModelica/simulation/libraries/msl32/Modelica.Electrical.Analog.Examples.CauerLowPassOPV.mos_temp5277/log-Modelica.Electrical.Analog.Examples.CauerLowPassOPV.mos "true " "" OpenModelicaModelTesting.Kind.VerifiedSimulation Modelica.Electrical.Analog.Examples.CauerLowPassOPV {"C3.v","C7.v","C1.v","C4.v","C8.v"} Alarm clock == 1 out of 1 tests failed [simulation/libraries/msl32/Modelica.Electrical.Analog.Examples.CauerLowPassOPV.mos_temp5277, time: 488]