Regression
simulation_libraries_msl32.Modelica.Electrical.Digital.Examples.DFFREGSRL.mos (from (result.xml))
Stacktrace
Output mismatch (see stdout for details)
Standard Output
+ Modelica.Electrical.Digital.Examples.DFFREGSRL ... execution failed ==== Log C:\Windows\TEMP/omc-rtest-OpenModelica/simulation/libraries/msl32/Modelica.Electrical.Digital.Examples.DFFREGSRL.mos_temp4535/log-Modelica.Electrical.Digital.Examples.DFFREGSRL.mos "true " "" OpenModelicaModelTesting.Kind.VerifiedSimulation Modelica.Electrical.Digital.Examples.DFFREGSRL {"set.y","data_1.y","data_0.y","clock.y","reset.y","dFFREGSRL.dataOut[1]","dFFREGSRL.dataOut[2]"} Simulation options: startTime = 0.0, stopTime = 15.0, numberOfIntervals = 500, tolerance = 1e-6, method = 'dassl', fileNamePrefix = 'Modelica.Electrical.Digital.Examples.DFFREGSRL', options = '', outputFormat = 'mat', variableFilter = 'time|set.y|data_1.y|data_0.y|clock.y|reset.y|dFFREGSRL.dataOut.1.|dFFREGSRL.dataOut.2.', cflags = '', simflags = ' -abortSlowSimulation -alarm=360 -emit_protected' Error: Simulation did not produce a result-file Errors: Failed to build model: Modelica.Electrical.Digital.Examples.DFFREGSRL == 1 out of 1 tests failed [simulation/libraries/msl32/Modelica.Electrical.Digital.Examples.DFFREGSRL.mos_temp4535, time: 3]